© FAMES
It is the first of the five Chips Act pilot lines to become operational, marking a major milestone for the Chips for Europe Initiative. Pilot lines are shared facilities where companies and researchers can test new chip designs, equipment, and processes at near-industrial scale before mass production.
FAMES represents EUR 830 million in combined investment from the EU and participating Member States. The pilot line focuses on Fully Depleted Silicon-on-Insulator (FD-SOI), a manufacturing process in which a thin insulating layer beneath each transistor allows chips to operate at significantly lower voltages, consuming 30-40% less power than conventional designs at equivalent performance.
Ultra-low-power technology for strategic sectors
Energy efficiency is a strategic priority for European industry. With information and communication technologies on track to consume up to 20% of global electricity by the end of the decade, ultra-low-power semiconductors are essential for sustainable digital infrastructure.
FAMES addresses this challenge through FD-SOI chips designed for applications where power consumption is critical: edge computing, automotive systems, IoT devices, 5G/6G communications, and components for defence, space, and medical devices. The technology also enables dynamic adjustment of the balance between performance and power consumption, even after the chip is manufactured.
European Partnership
The FAMES consortium brings together 11 research and technology organisations from across Europe, with CEA-Leti as coordinator. The inauguration at CEA-Leti unveiled a new cleanroom adding 2,000 m² of state-of-the-art capacity to the existing facilities. More than 40 industrial partners support the pilot line, including STMicroelectronics, SOITEC, Siemens, Nokia, GlobalFoundries, and ASML.
Access and skills development
FAMES offers fair and non-discriminatory access to SMEs, start-ups, and academic researchers alongside large industrial users. The first Open Call launched in March 2025, and a second is in preparation for 2026.
The FAMES Academy complements facility access with a four-year programme of training courses and workshops. The first European FD-SOI Design School, which took place in Grenoble from 25-30 January 2026, trained engineers in the foundations of chip design using FD-SOI technology.
Building momentum
The five pilot lines envisaged under the Chips Act together represent EUR 3.7 billion in combined EU and national investment, bridging Europe’s research excellence to industrial application. The FAMES inauguration marks the beginning of operational activity as these infrastructures move from set-up to full operation, strengthening the continent's semiconductor sovereignty.
Read more information
- The EU Chips Act
- The EU policy on advanced digital technologies
- The EU policy on electronic components and semiconductors
- CEA-Leti