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Shaping Europe’s digital future

European Chips Act: Security of supply and resilience

Pillar II of the European Chips Act sets up a framework to ensure the security of supply and resilience of the Union’s semiconductor sector by attracting investments and enhancing production capacities in manufacturing, advanced packaging, test, and assembly.

Overview of Pillar II main elements

factory icon

Status of integrated production facility and open EU foundry

  • Characteristics of IPFs and OEFs
  • Application and guidance
  • Benefits and obligations
Blue ribbon with star in centre

Label of design centre of excellence

  • Characteristics of design centres of excellence
  • Requirements and application for the label

Status of integrated production facility and open EU foundry

“First-of-a-kind” facilities are new or substantially upgraded semiconductor manufacturing facilities providing a dimension of innovation not yet present in the EU. Such facilities can apply to obtain the status of “integrated production facility” (IPF) or “open EU foundry” (OEF).

  • Integrated production facilities are vertically integrated semiconductor manufacturing facilities, which are involved in front-end manufacturing, in the production of equipment or key components for such equipment predominantly used in semiconductor manufacturing in the Union as well as in the design of integrated circuits or the provision of back-end services, or both.
  • Open EU foundries are semiconductor manufacturing facilities which dedicate at least a certain extent of their production capacity to produce chips according to the design of other companies, in particular fabless companies.
a chip lab

The status of IPF or OEF entitles undertakings to a streamlined approach to administrative applications and a priority access to the pilot lines set up under the “Chips for Europe Initiative” (Pillar I). Moreover, while applying for the status of IPF or OEF is a separate procedure from the State aid assessment of first-of-a-kind, where possible, these two procedures and the respective assessments are conducted in parallel.

In crisis stage, the Commission, after consulting the European Semiconductor Board, can ask undertakings granted the status of IPF or OEF to prioritise an order of crisis relevant products (priority-rated order).

Further details on eligibility rules, the application process and assessment procedure for the status of IPF and OEF will be soon made available in a guidance.

Label of design centres of excellence

Two people around a computer

The Commission may award a label of “design centre of excellence” to design centres established in the Union that significantly enhance the Union’s capabilities in innovative chip design through their service offerings or through the development, promotion and strengthening of design skills and capabilities.

The procedure for applications and the requirements and conditions for the granting, monitoring and withdrawal of the label will be set out by the Commission by means of delegated acts.